A switched-mode (sometimes referred to as switching-mode) power supply (SMPS) is an electronic power supply that includes a switching regulator to convert electrical power efficiently. In the same manner as other power supplies, an SMPS transfers power from a DC or AC source (often mains power), to DC loads for devices such as a personal computer, whilst converting voltage and current characteristics. Unlike a linear power supply, the pass transistor of a switching-mode supply continually switches between low-dissipation ‘full-on’ and ‘full-off’ states, and spends very little time in the high dissipation transitions, in order to minimize wasted energy.
There are two main operational modes that are used to control the behaviour of a SMPS, namely voltage mode and current-mode. Voltage-controlled mode is where the actual output voltage is compared to the desired output voltage and the difference (sometimes referred to as voltage error) is used to adjust a pulse width modulated (pwm) duty cycle in order to control the voltage across an inductor. Recently, current-mode control was developed to correct some known issues with voltage mode. Current-mode uses the error between the desired and actual output voltages to control the peak current through the inductor.
Referring now to FIG. 1, a known current-mode boost (DC-DC) converter circuit 100 is shown. Referring also to FIG. 2, a known current-mode waveform 200 of the boost converter circuit 100 of FIG. 1 is shown.
In the known current-mode boost converter circuit 100, a clock pulse 105 of a clock cycle sets a latch of R-S flip-flop 110, which closes the power switch 115. The current ramps up 205 from a minimum current level 202 in an inductor 120, following a particular current slope shape. When the sensed current 117 reaches a particular (target) value 132, 204, i.e. min(Verr/R, Ilim/Ri), a first comparator 125 detects it and provides a reset signal 144 to reset the latch 130. The power switch 115 now opens and waits for the next clock cycle 214, in order to close again. A feedback loop 135 controls the peak current set point 215 (Vea), and thereby indirectly the duty cycle 220, and thus generates a current-mode power supply.
The cost of the inductor 120 in a SMPS is related to the inductance value and the maximal rated current. Exceeding a maximal rated current of the SMPS reduces the value of the inductor and causes unexpected, undesirable, behavior. Hence, SMPS designs specify a maximum inductor peak current. In current-mode, for any SMPS duty cycle that is higher than 50%, a slope compensation circuit must be introduced to avoid sub-harmonic oscillations occurring. A slope compensation circuit is applied via Vramp 152 (as slope compensation 230 of FIG. 2) and added to the present voltage (is(t)*Ri). This information is compared in comparator 125 to the output of the error amplifier 155.
However, this slope compensation affects the inductor peak current limit (Ilimit), as the current limitation is reduced according to the duty cycle 220. This modification of the Ilimit value, means a reduction on the output current capability of the SMPS, especially in cases of: low inductor value, high duty cycle and/or in a boost converter application.
However, for a boost converter application, at a high duty cycle, a high current peak is required to have a high load current capability. Hence, cancelling the effect of the slope compensation is a desirable aim.
An ‘OR’ gate 145 is connected to the two comparators 125 and 142, which provide two alternative options to trigger a reset signal 130 to the R-S flip-flop 110 based on the triggering of a reset signal from comparator 125 or the output comparator 142.
In U.S. Pat. No. 5,717,322, titled ‘Method to improve the peak current limit in a slope compensated, current-mode DC/DC converter, and circuit therefore’, the Ilimit value is changed cycle after cycle, based on the slope compensation value. Such a solution is difficult and costly to implement, due to a need for a sample and hold circuit.
Thus, there exists a need for a circuit and method that cancels or reduces the slope compensation negative effect on the output current capability of a current controlled SMPS, and preferably prevents, at the same time, the inductor from exceeding the maximal rated current.